Radar receiver

A radar receiver includes an ADC (510) that samples analog intermediate frequency (IF) signaling to generate digital signaling, where the digital signaling includes a plurality of digital values; a digital processor that populates a 2-dimensional array of block group values based on the digital values such that: a first axis of the 2-dimensional array is a fast time axis and a second axis of the 2-dimensional array is a slow time axis; and a sampling rate regulator configured to set a sampling rate associated with the block group values in the 2-dimensional array based on an index of the slow time axis. The digital processor also performs DFT calculations on the chunk values in the 2-dimensional array along the fast time axis and the slow time axis in order to determine the distance and velocity of any detected object. 一种雷达接收器包括：ADC(510)，其对模拟中频IF信令进行取样以便产生数字信令，其中所述数字信令包括多个数字值；数字处理器，其基于所述数字值填充块组值的2维阵列，以使得：所述2维阵列的第一轴为快速时间轴并且所述2维阵列的第二轴为缓慢时间轴；以及取样速率调节器，其被配置成基于所述缓慢时间轴的索引设置与所述2维阵列中的所述块组值相关联的取样速率。所述数字处理器还沿着所述快速时间轴和所