Delay and bit width variable pipelined cache data caching method and device

The invention discloses a pipelined cache data caching method and device with variable delay and bit width, and the method comprises the steps: S01, when a caching request is received, caching the request in buffers corresponding to a plurality of data array groups in a pipelined manner, and generat...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	ZHOU HONGWEI, HUANG SHENGYU, RAO JIANBO, ZENG KUN, SHAO JINGJIE, JIN HUI
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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