Dual-channel high-speed data acquisition device based on FPGA (Field Programmable Gate Array) processor and acquisition method thereof

The invention provides a dual-channel high-speed data acquisition device and method based on an FPGA processor, and the device comprises a first sampling channel, a second sampling channel, a high-speed AD sampling circuit, the FPGA processor, an STM32 controller, a display screen, a pulse transmitting port, a memory, and a power module which provides a power supply for each part of the device. The sampling channel comprises an SMA input interface, a single-ended to differential circuit, a numerical control amplifier and a fully differential amplifier. A clock and a channel of the high-speed AD sampling circuit are controlled to be switched through the FPGA processor, data are primarily processed through an internal dual-port RAM, and the processed data are stored in an external memory. And the STM32 controller reads the data in the memory for secondary processing, and displays the data of the two channels on a screen. The sampling device has the advantages that by switching the clock and the sampling channel