Semiconductor device with p-type cap layer

The invention discloses a semiconductor device with a p-type cap layer. A p-type cap layer of the semiconductor device is divided into two or more regions, and the p-type cap layer regions are isolated by dielectric layers. For the nitride heterojunction field effect transistor, a p-type cap layer located between a source electrode and a drain electrode is divided into two or more areas, the p-type cap layer area closest to the drain electrode can be influenced by the drain electrode voltage of a device, but the influence of the drain electrode voltage of the device can be obviously reduced from the p-type cap layer area which is closer to or farther than the drain electrode. And the instability of the device caused by the p-type cap layer region closest to the drain electrode is counteracted by other p-type cap layer regions, so that the reliability of the device is improved, and the stability of the device during application in a circuit is improved. 本发明公开了一种具有p型冒层的半导体器件。所述半导体器件的p型冒层被分割为两个或更多个区域，这些p型冒层区域之间由