Preparation method of MOS (Metal Oxide Semiconductor) structure by self-alignment process

A preparation method of an MOS structure self-alignment technology comprises the steps that a substrate and an epitaxial wafer are provided, and a JFET area is formed in the epitaxial wafer through ion implantation; a mask layer is prepared on the surface, away from the substrate, of the epitaxial wafer, a through hole is formed in the mask layer to expose the epitaxial wafer, and a P well region is formed in the epitaxial wafer through ion implantation; the mask layer is reserved, a polycrystalline silicon material side wall is formed on the surface, away from the substrate, of the P well region, the side wall is attached to the hole wall of the through hole, and the P well region is partially exposed; taking the mask layer and the side wall as shielding, performing ion implantation on the exposed P well region to form an N + region in the P well region, and then removing the mask layer and the side wall; and performing ion implantation on the epitaxial wafer to form a P + region. By adopting the self-alignm