Class-C voltage-controlled oscillator applied to low-jitter sub-sampling phase-locked loop

The invention discloses a class-C voltage-controlled oscillator applied to a low-jitter sub-sampling phase-locked loop, which relates to the technical field of integrated circuits and comprises a power supply circuit, an energy storage circuit, a PMOS (P-channel Metal Oxide Semiconductor) biasing circuit, an NMOS (N-channel Metal Oxide Semiconductor) biasing circuit, a first RC (Resistance-Capacitance) network, a second RC network, a complementary PMOS circuit, a complementary NMOS circuit, a switched capacitor array and a differential oscillation tank, the NMOS bias circuit is used for providing a common-mode bias level for the complementary NMOS circuit, the first RC network is used for providing a differential-mode bias level for the complementary NMOS circuit, and the complementary NMOS circuit is used for transmitting a current pulse to the differential oscillation tank; the PMOS bias circuit is used for providing a common-mode bias level for the complementary PMOS circuit, the second RC network is used