Secondary device detection using synchronous interface

The chiplet system may include a serial peripheral interface (SPI) bus for communication. A controller or primary device coupled to the SPI bus may generate messages with read or write instructions for one or more secondary devices. In an example, the primary device may be configured to use informat...

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Bibliographische Detailangaben
Hauptverfasser: WALKER DAVID E, BREWER TONY M
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The chiplet system may include a serial peripheral interface (SPI) bus for communication. A controller or primary device coupled to the SPI bus may generate messages with read or write instructions for one or more secondary devices. In an example, the primary device may be configured to use information on a data input port or a data input bus to determine a communication state of one or more secondary devices on the bus. 小芯片系统可包含用于通信的串行外围接口(SPI)总线。耦合到所述SPI总线的控制器或初级装置可用针对一或多个次级装置的读取或写入指令产生消息。在实例中,所述初级装置可经配置以使用数据输入端口或数据输入总线上的信息来确定所述总线上的一个或多个次级装置的通信状态。