Flash module test method and system
The invention discloses a Flash module testing method and system, and belongs to the field of wafer testing. For the test of a chip with an embedded Flash module, the Flash module needs to be subjected to two operations of reading and writing for many times. According to the scheme in the prior art,...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a Flash module testing method and system, and belongs to the field of wafer testing. For the test of a chip with an embedded Flash module, the Flash module needs to be subjected to two operations of reading and writing for many times. According to the scheme in the prior art, a pattern is written firstly, when a certain address bit of Flash needs to be operated subsequently, a command, an address and data in the pattern are read and modified, and operation on a target address bit is completed through the run pattern. Wherein the address modification step consumes obvious time. Aiming at the problem of long time consumption of Flash module test in the prior art, the method optimizes address format conversion and pattern generation and update steps, and pre-loads read and write patterns corresponding to all test addresses in a test machine, so that the method can realize optimization of Flash module test time and improve test efficiency.
本发明公开了一种Flash模块测试方法和系统,属于晶圆测试领域领域。对于内嵌Flash模块芯片的测试 |
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