Semiconductor device and manufacturing method thereof

A method of manufacturing a semiconductor device includes: forming a plurality of reference patterns and a peripheral pattern on a feature layer by using a first material such that the peripheral pattern is connected to ends of the plurality of reference patterns; forming a plurality of first spacer...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: HAN SEUNG-HEE, LEE HA-YOUNG, LEE CHAN-MI, CHUNG SANG-GYO, CHUN KWANG-HEE
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator HAN SEUNG-HEE
LEE HA-YOUNG
LEE CHAN-MI
CHUNG SANG-GYO
CHUN KWANG-HEE
description A method of manufacturing a semiconductor device includes: forming a plurality of reference patterns and a peripheral pattern on a feature layer by using a first material such that the peripheral pattern is connected to ends of the plurality of reference patterns; forming a plurality of first spacers on both sidewalls of each of the plurality of reference patterns by using a second material; removing the plurality of reference patterns; forming a plurality of second spacers on both sidewalls of each of the plurality of first spacers by using a first material; removing the plurality of first spacers such that the plurality of second spacers and the peripheral pattern are retained on the feature layer; and patterning the feature layer by using the plurality of second spacers and the peripheral pattern as an etch mask. 一种制造半导体器件的方法,包括:通过使用第一材料在特征层上形成多个参考图案和外围图案,使得外围图案连接到多个参考图案的端部;通过使用第二材料在多个参考图案中的每一个参考图案的两个侧壁上形成多个第一间隔物;去除多个参考图案;通过使用第一材料在多个第一间隔物中的每一个第一间隔物的两个侧壁上形成多个第二间隔物;去除多个第一间隔物,使得多个第二间隔物和外围图案保留在特征层上;以及通过使用多个第二间
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN116544109A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN116544109A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN116544109A3</originalsourceid><addsrcrecordid>eNrjZDANTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE3MK01LTC4pLcrMS1fITS3JyE9RKMlILUrNT-NhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfHOfoaGZqYmJoYGlo7GxKgBAJ1kLZ4</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device and manufacturing method thereof</title><source>esp@cenet</source><creator>HAN SEUNG-HEE ; LEE HA-YOUNG ; LEE CHAN-MI ; CHUNG SANG-GYO ; CHUN KWANG-HEE</creator><creatorcontrib>HAN SEUNG-HEE ; LEE HA-YOUNG ; LEE CHAN-MI ; CHUNG SANG-GYO ; CHUN KWANG-HEE</creatorcontrib><description>A method of manufacturing a semiconductor device includes: forming a plurality of reference patterns and a peripheral pattern on a feature layer by using a first material such that the peripheral pattern is connected to ends of the plurality of reference patterns; forming a plurality of first spacers on both sidewalls of each of the plurality of reference patterns by using a second material; removing the plurality of reference patterns; forming a plurality of second spacers on both sidewalls of each of the plurality of first spacers by using a first material; removing the plurality of first spacers such that the plurality of second spacers and the peripheral pattern are retained on the feature layer; and patterning the feature layer by using the plurality of second spacers and the peripheral pattern as an etch mask. 一种制造半导体器件的方法,包括:通过使用第一材料在特征层上形成多个参考图案和外围图案,使得外围图案连接到多个参考图案的端部;通过使用第二材料在多个参考图案中的每一个参考图案的两个侧壁上形成多个第一间隔物;去除多个参考图案;通过使用第一材料在多个第一间隔物中的每一个第一间隔物的两个侧壁上形成多个第二间隔物;去除多个第一间隔物,使得多个第二间隔物和外围图案保留在特征层上;以及通过使用多个第二间</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230804&amp;DB=EPODOC&amp;CC=CN&amp;NR=116544109A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230804&amp;DB=EPODOC&amp;CC=CN&amp;NR=116544109A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HAN SEUNG-HEE</creatorcontrib><creatorcontrib>LEE HA-YOUNG</creatorcontrib><creatorcontrib>LEE CHAN-MI</creatorcontrib><creatorcontrib>CHUNG SANG-GYO</creatorcontrib><creatorcontrib>CHUN KWANG-HEE</creatorcontrib><title>Semiconductor device and manufacturing method thereof</title><description>A method of manufacturing a semiconductor device includes: forming a plurality of reference patterns and a peripheral pattern on a feature layer by using a first material such that the peripheral pattern is connected to ends of the plurality of reference patterns; forming a plurality of first spacers on both sidewalls of each of the plurality of reference patterns by using a second material; removing the plurality of reference patterns; forming a plurality of second spacers on both sidewalls of each of the plurality of first spacers by using a first material; removing the plurality of first spacers such that the plurality of second spacers and the peripheral pattern are retained on the feature layer; and patterning the feature layer by using the plurality of second spacers and the peripheral pattern as an etch mask. 一种制造半导体器件的方法,包括:通过使用第一材料在特征层上形成多个参考图案和外围图案,使得外围图案连接到多个参考图案的端部;通过使用第二材料在多个参考图案中的每一个参考图案的两个侧壁上形成多个第一间隔物;去除多个参考图案;通过使用第一材料在多个第一间隔物中的每一个第一间隔物的两个侧壁上形成多个第二间隔物;去除多个第一间隔物,使得多个第二间隔物和外围图案保留在特征层上;以及通过使用多个第二间</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDANTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE3MK01LTC4pLcrMS1fITS3JyE9RKMlILUrNT-NhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfHOfoaGZqYmJoYGlo7GxKgBAJ1kLZ4</recordid><startdate>20230804</startdate><enddate>20230804</enddate><creator>HAN SEUNG-HEE</creator><creator>LEE HA-YOUNG</creator><creator>LEE CHAN-MI</creator><creator>CHUNG SANG-GYO</creator><creator>CHUN KWANG-HEE</creator><scope>EVB</scope></search><sort><creationdate>20230804</creationdate><title>Semiconductor device and manufacturing method thereof</title><author>HAN SEUNG-HEE ; LEE HA-YOUNG ; LEE CHAN-MI ; CHUNG SANG-GYO ; CHUN KWANG-HEE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN116544109A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>HAN SEUNG-HEE</creatorcontrib><creatorcontrib>LEE HA-YOUNG</creatorcontrib><creatorcontrib>LEE CHAN-MI</creatorcontrib><creatorcontrib>CHUNG SANG-GYO</creatorcontrib><creatorcontrib>CHUN KWANG-HEE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HAN SEUNG-HEE</au><au>LEE HA-YOUNG</au><au>LEE CHAN-MI</au><au>CHUNG SANG-GYO</au><au>CHUN KWANG-HEE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device and manufacturing method thereof</title><date>2023-08-04</date><risdate>2023</risdate><abstract>A method of manufacturing a semiconductor device includes: forming a plurality of reference patterns and a peripheral pattern on a feature layer by using a first material such that the peripheral pattern is connected to ends of the plurality of reference patterns; forming a plurality of first spacers on both sidewalls of each of the plurality of reference patterns by using a second material; removing the plurality of reference patterns; forming a plurality of second spacers on both sidewalls of each of the plurality of first spacers by using a first material; removing the plurality of first spacers such that the plurality of second spacers and the peripheral pattern are retained on the feature layer; and patterning the feature layer by using the plurality of second spacers and the peripheral pattern as an etch mask. 一种制造半导体器件的方法,包括:通过使用第一材料在特征层上形成多个参考图案和外围图案,使得外围图案连接到多个参考图案的端部;通过使用第二材料在多个参考图案中的每一个参考图案的两个侧壁上形成多个第一间隔物;去除多个参考图案;通过使用第一材料在多个第一间隔物中的每一个第一间隔物的两个侧壁上形成多个第二间隔物;去除多个第一间隔物,使得多个第二间隔物和外围图案保留在特征层上;以及通过使用多个第二间</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_CN116544109A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor device and manufacturing method thereof
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-02T17%3A39%3A17IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HAN%20SEUNG-HEE&rft.date=2023-08-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN116544109A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true