Method and system for simulating and verifying layout based on distribution

A method of simulating a layout of an integrated circuit manufactured by a semiconductor process includes: extracting a plurality of pattern layouts from layout data defining the layout; generating training data by amplifying the plurality of pattern layouts and at least one parameter provided from the semiconductor process; sampling the training data to generate sample data; generating feature data including a three-dimensional array from the sample data; respectively providing the sample data and the feature data for a simulator and a machine learning model; and training the machine learning model based on the output of the machine learning model and the output of the simulator. 一种模拟由半导体工艺制造的集成电路的布局的方法，包括：从定义布局的布局数据中提取多个图案布局；通过放大多个图案布局和从半导体工艺提供的至少一个参数来生成训练数据；通过对训练数据进行采样生成样本数据；从样本数据生成包括三维阵列的特征数据；将样本数据和特征数据分别提供给模拟器和机器学习模型；以及基于机器学习模型的输出和模拟器的输出训练机器学习模型。