Asynchronous counter, analog-to-digital converter and image sensor

The invention provides an asynchronous counter, an analog-to-digital converter and an image sensor, the asynchronous counter comprises a first-stage counter circuit to an nth-stage counter circuit which are cascaded, a selection circuit, a delay output circuit and a logic circuit, at the beginning of quantization, the selection circuit directly selects and outputs a clock signal to a second-stage counter circuit, and the delay output circuit outputs the clock signal to the second-stage counter circuit; when quantization is finished, the logic circuit outputs a fixed level signal, the first-stage counter circuit does not work, the logic circuit outputs a second clock signal when quantization is finished, and the first-stage counter circuit latches and outputs a current value of the input second clock signal at a trigger signal of a high level pulse signal. Therefore, the first-stage counter circuit is shielded in the quantization process, invalid clock flipping in the first-stage counter circuit is reduced, an