LATCH CIRCUIT AND DATA DRIVER INCLUDING THE SAME

An embodiment provides a latch circuit outputting a digital signal including gray level data to a digital-to-analog converter (DAC), the latch circuit including: a first latch configured to store the digital signal; and a second latch configured to output the digital signal by controlling a first timing at which a level of a first signal included in the digital signal becomes an enable level based on the central gray level. The gray level data includes first gray level data and second gray level data. 实施例提供一种将包括灰度级数据的数字信号输出到数模转换器(DAC)的锁存电路，该锁存电路包括：第一锁存器，配置为存储数字信号；以及第二锁存器，配置为通过基于中央灰度级控制包括在数字信号中的第一信号的电平变为使能电平的第一定时来输出数字信号。灰度级数据包括第一灰度级数据和第二灰度级数据。