Method for high-speed communication avoidance pulse train test interference of acquisition terminal

The invention discloses a high-speed communication pulse train test interference avoidance method for an acquisition terminal, and the technical scheme comprises the following steps: 1, an external interruption pin 1 of a micro control chip is externally connected with an annular antenna, an externa...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SU CHAO, GE YULEI, CAO XIAOFAN, XU MINQIU, LIU TENGSHENG
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The invention discloses a high-speed communication pulse train test interference avoidance method for an acquisition terminal, and the technical scheme comprises the following steps: 1, an external interruption pin 1 of a micro control chip is externally connected with an annular antenna, an external interruption pin 2 is externally connected with a monopole antenna, and magnetic field interference and electric field interference generated by a pulse train are respectively detected; step 2, the external interrupt pin 1 or 2 repeatedly enters the acquisition terminal key interrupt program to detect interference; step 3, when the interference detection flag bit is 1, calling a notifyfunc function, otherwise, keeping normal high-speed communication; and 4, when the key evasion pulse train flag bit is 1, pausing the high-speed communication and recovering the high-speed communication after delaying for 50ms, otherwise, keeping normal high-speed communication. According to the method, pulse train interference can