Anti-radiation Serdes transceiver CDR circuit based on phase interpolation

A radiation-proof Serdes transceiver CDR circuit based on phase interpolation abandons a traditional CDR circuit completely based on a PLL structure, and adopts a data and edge double-high-speed sampler, a radiation-proof CDR state machine, a high-precision phase interpolator and a universal PLL based on an LC oscillator to recover high-speed data and clock of 0.5-12.5 Gbps. The high loop stability, the single particle irradiation resistance, the short phase capture time, the high linearity and the low jitter of the CDR are achieved. 一种基于相位插值的抗辐照Serdes收发器CDR电路，摒弃传统的完全基于PLL结构的CDR电路，采用数据和边沿双高速采样器、抗辐照CDR状态机、高精度相位插值器和基于LC振荡器的通用PLL实现对0.5～12.5Gbps高速数据和时钟进行恢复，实现CDR的强环路稳定性、抗单粒子辐照、较短的相位捕获时间、较高的线性度和较低的抖动。