Cascaded GaN power device packaging structure

The invention discloses a cascaded GaN power device packaging structure, which is characterized in that an AIN layer is provided with a cavity, an HEMT chip is located in the cavity of the AIN layer and is right arranged on the upper surface of a frame base island, an MOSFET chip is located on the upper surface of an AlN layer, and a grid electrode of the HEMT chip and a drain electrode of the MOSFET chip form area stacking; the frame pins comprise a frame grid electrode pin, a frame source electrode pin and a frame drain electrode pin; the frame grid electrode pin, the frame source electrode pin and the frame drain electrode pin are arranged in parallel and are vertically positioned on the same side edge of the frame base island; the drain electrode of the HEMT chip is electrically connected with the frame drain electrode pin, the source electrode of the MOSFET chip is electrically connected with the frame source electrode pin, and the grid electrode of the MOSFET chip is electrically connected with the fram