Full GaN integrated chip structure and preparation method thereof

The invention discloses a full GaN integrated chip structure and a preparation method thereof. The chip structure comprises a semi-insulating SiC substrate; a conductive bonding layer; the full GaN circuit structure layer sequentially comprises a buffer layer, a channel layer and a barrier layer from bottom to top and further comprises a first deep groove, a second deep groove and a passivation layer, the groove bottom of the first deep groove is connected with the conductive bonding layer, the groove wall penetrates to the barrier layer, and metal connected with the source electrode and the conductive bonding layer grows on the inner wall of the first deep groove; the bottom of the second deep groove is connected with the semi-insulating SiC substrate, the wall of the second deep groove penetrates to the barrier layer, and an insulating medium is deposited on the inner wall of the second deep groove. According to the invention, monolithic isolation of high-side and low-side potentials in the full GaN integra