ADC sampling jitter elimination method and device based on integral model
The invention is suitable for the technical field of data processing, and particularly relates to an ADC sampling jitter elimination method based on an integral model, and the method comprises the following steps: obtaining an ADC sampling value; comparing the ADC sampling value with a preset limit...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | The invention is suitable for the technical field of data processing, and particularly relates to an ADC sampling jitter elimination method based on an integral model, and the method comprises the following steps: obtaining an ADC sampling value; comparing the ADC sampling value with a preset limit value of an integration region, and if it is judged that the ADC sampling value does not exceed the preset limit value; if so, adding 1 to an integral value of an integral region corresponding to the ADC sampling value; finding out the maximum integral value in the integral region; and outputting the ADC sampling value corresponding to the maximum integral value as a sampling result. The invention further provides an ADC sampling jitter elimination device based on the integral model, computer equipment and a computer readable storage medium. According to the ADC sampling jitter elimination method based on the integral model provided by the embodiment of the invention, the mathematical integral model is utilized to |
---|