Low power standby mode for memory device

The invention relates to a low power standby mode for a memory device. A memory device may include a control circuit configured to operate a memory device in one of an active mode, a standby mode, and a sleep mode, where the memory device is configured to receive a command from a host device while in the standby mode; a voltage regulator having an output providing a supply voltage for accessing content of a memory cell in the memory device, where the voltage regulator is turned off during the sleep mode and the standby mode, and the voltage regulator is turned on during the active mode; and a storage element configured to maintain the supply voltage to allow the voltage regulator to be turned off during the standby mode at least until the voltage regulator is turned on and supports the supply voltage in the active mode. 本发明涉及存储器装置的低功率待机模式。存储器装置可以包括：控制电路，该控制电路被配置成对处于活动模式、待机模式和休眠模式中的一种模式下的存储器装置进行操作，其中，存储器装置被配置成在处于待机模式时从主机装置接收命令；电压调节器，该电压调节器具有输出端，该输出端提供用于访问存储器装置中的存储器单元的内容的电源电压，其中，在休眠模式和待机模式期间，电压调节器是关闭的，并且在活动模式期间