Semiconductor packaging structure

The invention discloses a semiconductor package, comprising: a first redistribution layer; a first semiconductor die disposed over the first redistribution layer and including a first via having a first width; a second via adjacent to the first semiconductor die and having a second width greater than the first width; a molding material surrounding the first semiconductor die and the second via; a second semiconductor die disposed over the molding material and electrically coupled to the first via and the second via; and a second redistribution layer disposed over the second semiconductor die. The semiconductor packaging structure provided by the invention comprises a plurality of stacked semiconductor crystal grains instead of a large semiconductor crystal grain, so that the manufacturing cost and difficulty can be reduced, and the yield and the performance can be improved. In addition, due to the fact that thermal coupling is avoided, heat dissipation efficiency can be enhanced. 本发明公开一种半导体封装，包括：第一重分布层；第一半导体晶