Integrated semiconductor device isolation package

The invention relates to an integrated semiconductor device isolation package. In described examples, an apparatus includes a transformer (Figure 3, 306) including: an isolation dielectric layer (311) having a first surface (312) and a second surface (310) opposite the first surface; a first inductor (307) formed over the first surface, the first inductor comprising a first ferrite material layer (331) and a first coil (313) at least partially covered by the first ferrite material layer; and a second inductor (309) formed over the second surface (310), the second inductor comprising a second layer of ferrite material (333) and a second coil (321) at least partially covered by the second layer of ferrite material. 本申请涉及一种集成半导体装置隔离封装。在所描述的实例中，一种设备包含变压器(图3，306)，其包含：隔离电介质层(311)，其具有第一表面(312)及与所述第一表面相对的第二表面(310)；第一电感器(307)，其形成于所述第一表面上方，所述第一电感器包括第一铁氧体材料层(331)及至少部分由所述第一铁氧体材料层覆盖的第一线圈(313)；及第二电感器(309)，其形成于所述第二表面(310)上方，所述第二电感器包括第二铁氧体材料层(333)及至少部分由所述第二铁氧体材料层覆盖的第二线圈(321)。