Error correction and detection method and system of memory and controller

The invention discloses an error correction and detection method and system for a memory and a controller, and the method comprises the steps: carrying out the EDC (Error Detection Code) coding and ECC (Error Checking and Correction) coding of user data in sequence, and obtaining first coded data; writing the user data and the first coded data into a memory; and performing ECC verification and EDC verification on the data stored in the memory in sequence to obtain an error correction and detection result. According to the method, single-bit error correction can be guaranteed, meanwhile, good error checking capacity of multi-bit errors is achieved, normal use of the memory can be guaranteed, the memory has high protection capacity no matter transient failure or permanent failure occurs, and system crash is avoided. 本发明公开了一种存储器的纠错检错方法、系统以及控制器，方法包括：对用户数据先后进行差错检测码EDC编码和错误检验和纠正ECC编码，得到第一编码数据；将用户数据和第一编码数据写入存储器；对存储器中存储的数据先后进行ECC校验和EDC校验，得到纠错检错结果。该方法可在保证单比特纠错的同时又拥有较好的多比特错误的检查错误的能力，从而可确保存储器的正常使用，使存储器无论发生瞬态还是永久失效都有较强的防