Semiconductor device structure

A semiconductor device structure according to the present invention includes a metal-insulator-metal (MIM) stack including a plurality of conductor plate layers interleaved with a plurality of insulator layers. The MIM stack includes a first region and a second region, and the first region and the second region overlap in a third region. The MIM stack further includes a first via passing through the first region and electrically coupled to a first subset of the plurality of conductor plies; a second via passing through the second region and electrically coupled to a second subset of the plurality of conductor plies; and a ground via passing through the third region and electrically coupled to a third subset of the plurality of conductor plies. At least one of the third subset of the plurality of conductor plies vertically overlaps at least one of the first subset of the plurality of conductor plies and at least one of the second subset of the plurality of conductor plies. 根据本发明的半导体器件结构包括金属-绝缘体-金属(MIM)堆叠件，该MIM