Method and system for reconstructing hierarchical structure of integrated circuit design layout and storage medium
The invention relates to the technical field of integrated circuits, in particular to an integrated circuit design layout hierarchical structure reconstruction method and system and a storage medium, and the method comprises the following steps: obtaining a layout, and dividing the layout to obtain...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention relates to the technical field of integrated circuits, in particular to an integrated circuit design layout hierarchical structure reconstruction method and system and a storage medium, and the method comprises the following steps: obtaining a layout, and dividing the layout to obtain a plurality of local areas; obtaining graphs in the local area, and grouping the graphs according to whether the distance between every two graphs is smaller than a preset distance or not; judging whether a distance between a graph and a boundary line of the local area is smaller than a preset distance in each group; if not, marking the group as a first class group; if yes, marking the group as a second class group; analyzing whether the distance between every two groups of the second class groups is smaller than a preset distance, if so, establishing a connection relationship between the two groups, and forming a first class group according to the connection relationship; and respectively calculating the hash valu |
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