Time sequence conversion connection method for AXI bus and EMIF bus
The invention provides a time sequence conversion connection method for an AXI bus and an EMIF bus, and the connection method comprises the steps: firstly determining the control logic of the EMIF bus, selecting a specific AXI bus signal, supplementing an internal intermediate logic signal for the t...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides a time sequence conversion connection method for an AXI bus and an EMIF bus, and the connection method comprises the steps: firstly determining the control logic of the EMIF bus, selecting a specific AXI bus signal, supplementing an internal intermediate logic signal for the two signals, carrying out the logic and time sequence bonding, and achieving the stable and reliable data transmission of two different data interfaces. Through the method, reliable conversion of logic and time sequence between the AXI bus and the EMIF bus can be realized.
本申请提供了一种AXI总线与EMIF总线时序转换连接方法,该连接方法首先明确EMIF总线的控制逻辑,同时挑选特定的AXI总线信号,针对两种信号补充内部的中间逻辑信号,进行逻辑与时序粘合,实现两种不同的数据接口稳定可靠的数据传输。通过该方法可实现AXI总线与EMIF总线间逻辑与时序的可靠转换。 |
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