Multistage extensible TLB structure suitable for RISC-V
The invention discloses a multi-level extensible TLB structure suitable for RISC-V. The TLB structure comprises multi-level TLBs, the multi-level TLB comprises a first-level TLB and second-level to N-level TLBs which can be selected and used, and the TLBs are used for storing page table entries from...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a multi-level extensible TLB structure suitable for RISC-V. The TLB structure comprises multi-level TLBs, the multi-level TLB comprises a first-level TLB and second-level to N-level TLBs which can be selected and used, and the TLBs are used for storing page table entries from virtual addresses to physical addresses and converting the virtual addresses into actual physical addresses; the stlbctrl register is used for providing a management function for the TLB; the stlblv register, the stlbidx register, the stlb0 register, the stlb1 register and the stlb2 register can be selectively used, the stlblv register is used for indicating the number of levels of the TLB when the TLB is managed, the stlbidx register is used for indicating an index of the TLB in a certain level when the TLB is managed, the stlb0 register is used for giving a virtual page number when the TLB is managed, the stlb1 register is used for giving a physical page number and access control information when the TLB is mana |
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