Debugging interface circuit and chip

The invention provides a debugging interface circuit and a chip. The debugging interface circuit comprises a protocol conversion unit which is used for receiving a signal of a first interface and returning data of a second interface to the first interface; the switch unit is electrically connected between the protocol conversion unit and the first interface and is used for enabling or disabling the protocol conversion unit; wherein the switch unit comprises a configuration element, and the switch unit is enabled or disabled through the configuration element. According to the debugging interface circuit, an effective interface can be provided for chip debugging and base station testing, the number of occupied input and output ports is small, the speed is high, the testing cost can be greatly saved, the debugging interface circuit can be forbidden after debugging is finished, and the safety performance is high. 本发明提供一种调试接口电路及芯片。调试接口电路包括一协议转换单元，用于接收第一接口的信号并将第二接口的数据返回至所述第一接口；一开关单元，电性连接于所述协议转换单元与所述第一接口之间，用于使能或禁能所述