Chip testing method, device and equipment and readable storage medium

The invention discloses a chip testing method, device and equipment and a readable storage medium in the technical field of integrated circuits. When different simulation examples of the same chip are executed, the next simulation example can skip test links which are repeated with the previous simulation example, that is, the next simulation example reuses the test result output by a certain test link of the previous simulation example, the next test link is directly executed based on the test result, and the test efficiency is improved. The same test link can be prevented from being repeatedly executed in different simulation examples, so that the test time is saved, the test efficiency is improved, and the test period is shortened. Correspondingly, the invention also provides a chip testing device and equipment and a readable storage medium, which also have the above technical effects. 本申请公开了集成电路技术领域内的一种芯片测试方法、装置、设备及可读存储介质。本申请在执行同一芯片的不同仿真实例时，后一仿真实例可以跳过与前一仿真实例存在重复的测试环节，也就是：后一仿真实例复用前一仿真实例的某一测试环节输出的测试结果，直接基于该