Semiconductor on-state voltage drop test main circuit topology and measurement method under pulse large current working condition

The invention discloses a semiconductor on-state voltage drop test main circuit topology under a pulse large-current working condition, which comprises a low-voltage turn-on circuit and a pulse large-current follow current circuit, and is characterized in that the low-voltage turn-on circuit is comp...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: LI WEICAO, ZOU SHUN, LI JIE, YANG CHENGUANG, SHA XINLE
Format: Patent
Sprache:chi ; eng
Schlagworte:
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