Semiconductor on-state voltage drop test main circuit topology and measurement method under pulse large current working condition
The invention discloses a semiconductor on-state voltage drop test main circuit topology under a pulse large-current working condition, which comprises a low-voltage turn-on circuit and a pulse large-current follow current circuit, and is characterized in that the low-voltage turn-on circuit is comp...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a semiconductor on-state voltage drop test main circuit topology under a pulse large-current working condition, which comprises a low-voltage turn-on circuit and a pulse large-current follow current circuit, and is characterized in that the low-voltage turn-on circuit is composed of a low-voltage capacitor C and a resistor R, and the pulse large-current follow current circuit is composed of a high-voltage capacitor C0, a control switch S0, an inductor L0 and a diode D0; the invention further discloses a measuring method of the measuring device, the semiconductor to be measured does not bear high voltage in the whole measuring process, a low-voltage sensor with a small measuring range can be used for measurement, and the measuring precision is ensured. The method solves the problem of measurement of the on-state voltage drop of the semiconductor under the working condition of pulse large current, and can be used for design guidance of a semiconductor branch in a hybrid circuit breaker t |
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