Semiconductor device with ferroelectric gate stack

A semiconductor device having a ferroelectric gate stack is disclosed. A semiconductor device includes a SiC substrate and a plurality of transistor cells formed in the SiC substrate and electrically connected in parallel to form a transistor. Each transistor cell includes a gate structure including a gate electrode and a gate dielectric stack separating the gate electrode from the SiC substrate. The gate dielectric stack includes a ferroelectric insulator. The transistor has a specific operating temperature range, and the ferroelectric insulator is doped with a doping material such that the Curie temperature of the ferroelectric insulator is within a range higher than the specific operating temperature range of the transistor. A corresponding method of producing a semiconductor device is also described. 公开了具有铁电栅极堆叠的半导体器件。一种半导体器件，包括SiC衬底和形成在SiC衬底中并且并联电连接以形成晶体管的多个晶体管单元。每个晶体管单元包括栅极结构，栅极结构包括栅极电极和将栅极电极与SiC衬底分离开的栅极电介质堆叠。栅极电介质堆叠包括铁电绝缘体。晶体管具有特定的工作温度范围，并且铁电绝缘体被利用掺杂材料掺杂，使得铁电绝缘体的居里温度在高于晶体管的特定的工作温度范围的范围内。还描述了生产半导体器件的对应的