Wafer acceptance test structure and test method thereof
The invention discloses a wafer acceptance test structure and a test method thereof, the wafer acceptance test structure comprises a substrate and a metal interconnection layer, the metal interconnection layer is arranged on the substrate, and the metal interconnection layer comprises at least two m...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a wafer acceptance test structure and a test method thereof, the wafer acceptance test structure comprises a substrate and a metal interconnection layer, the metal interconnection layer is arranged on the substrate, and the metal interconnection layer comprises at least two metal interconnection structures which are sequentially stacked from bottom to top. The metal interconnection structure comprises a dielectric layer, a connection plug and a metal layer, the connection plug is located in the dielectric layer and penetrates through the dielectric layer, the metal layer is located on the dielectric layer and comprises a first metal structure, a second metal structure and a third metal structure which are arranged at intervals, and the connection plug comprises a first sub-connection plug and a second sub-connection plug. The first metal structure is connected with the first sub-connection plug, the third metal structure is connected with the second sub-connection plug, the second meta |
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