Method for adjusting resistance value of polycrystalline silicon and semiconductor device

The invention provides a polycrystalline silicon resistance value adjusting method and a semiconductor device, and is applied to the technical field of semiconductor devices.The polycrystalline silicon resistance value adjusting method comprises the step of adjusting the resistance value of polycrystalline silicon through the electronic discharge effect in the etching process. Compared with the mode of adjusting the resistance value of the polycrystalline silicon by performing ion implantation on the polycrystalline silicon on the layer where the polycrystalline silicon is located in the prior art, the mode of adjusting the resistance value of the polycrystalline silicon through the electronic discharge effect in the etching process has the advantages that the adjusting range of the resistance value of the polycrystalline silicon is larger, and the cost is relatively low. 本申请提供一种多晶硅阻值的调节方法及半导体器件，应用于半导体器件技术领域，其中，多晶硅阻值的调节方法，包括：在刻蚀过程中通过电子的放电效应调节多晶硅的阻值。在刻蚀过程中通过电子的放电效应调节多晶硅的阻值的方式，相比于现有技术中在多晶硅所在的层，通过对多晶硅进行离子注入的方式调节