Stack implementation method and device based on Cache technology and storage medium

The invention discloses a stack implementation method and device based on the Cache technology and a storage medium, the method comprises the steps that a compiler allocates stack space for GPU Shader threads in DDR, and the problem that the DDR is low in speed is solved by adding the Cache special for the stack between the DDR and an MVP micro-architecture assembly line, the method can obtain balance between flexibility and performance, the MVP micro-architecture design is optimized, and the method is suitable for large-scale popularization and application. Besides, on the basis of the MVP micro-architecture design, the Cache caches the stack spaces of the four concurrent threads at the same time, under the condition that the stack space of the GPU threads becomes large, the stack Cache can still effectively cache according to the spatial locality principle, and therefore the limitation of the area and power consumption of a GPU chip is avoided. 本发明公开了一种基于Cache技术的栈实现方法、装置及存储介质，方法包括编译器在DDR中为GPU Shader线程分配栈空间，