Chip diode packaging process

The invention provides a surface-mounted diode packaging process which comprises the following steps: S1, a plurality of columns of positive and negative electrode pin groups are arranged in a frame, positive and negative electrode pins of each column of pin group are oppositely arranged, a gap is a...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HAN YUZHUAN, HAN XUEXIA, PENG WEIJUN, SONG JIANFENG
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The invention provides a surface-mounted diode packaging process which comprises the following steps: S1, a plurality of columns of positive and negative electrode pin groups are arranged in a frame, positive and negative electrode pins of each column of pin group are oppositely arranged, a gap is arranged between the positive and negative electrode pins to form a partition, and a certain distance is reserved between each two pin groups; and S2, sequentially and fixedly adhering the first layer of solder paste, the chip and the second layer of solder paste on the positive electrode pin. And S3, installing a jump piece, adhering one end of the jump piece to the second layer of solder paste, and adhering the other end of the jump piece to the cathode pin through the solder paste, thereby realizing bridging connection of the anode pin and the cathode pin. And S4, the frame is transferred to a tunnel furnace to be welded. And S5, punching the welded frame, and after the welded single diode is punched down, leavin