Flip-flop circuit, driving circuit and chip

The invention provides a flip-flop circuit, a driving circuit and a chip. The flip-flop circuit comprises: a clock signal generation circuit for generating a clock signal; the pulse signal generation circuit is connected with the clock signal generation circuit and is used for generating a pulse signal according to the clock signal, the period of the pulse signal is integer multiples of the clock signal, and the clock signal only has one driving edge in any high-level continuous time period of the pulse signal; the clock input end of the trigger is connected with the clock signal generation circuit and used for inputting the clock signal, and the enabling end of the trigger is connected with the pulse signal generation circuit and used for inputting the pulse signal. The flip-flop circuit can simplify a clock tree structure. 本发明提供一种触发器电路、驱动电路及芯片。所述触发器电路包括：时钟信号生成电路，用于生成时钟信号；脉冲信号生成电路，与所述时钟信号生成电路相连，用于根据所述时钟信号生成脉冲信号，所述脉冲信号的周期为所述时钟信号的整数倍，且在所述脉冲信号的任一高电平持续时间段内所述时钟信号仅存在一个驱动沿；触发器，所述触发器的时钟输入端与所述时钟信号生成电路相连，用于输入所述时钟信号，所述