Chip automatic identification test method and system based on daughter board and mother board
The invention provides an automatic chip identification test method and system based on a mother-son board, and the method comprises the steps: designing a mother board, enabling a plurality of interfaces to be connected with a connector through an MCU, and enabling the interfaces to be matched with...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides an automatic chip identification test method and system based on a mother-son board, and the method comprises the steps: designing a mother board, enabling a plurality of interfaces to be connected with a connector through an MCU, and enabling the interfaces to be matched with a DUT; daughter boards and daughter board connectors are designed, signals are in one-to-one correspondence with mother boards, and power supplies required by DUTs of different models and a plurality of interfaces are from the mother boards through the connectors; a mother board and a daughter board form a test platform through a connector, the test platform, a PC, an incubator and a test instrument form a new test system, drive programs and chip IDs of DUTs are burnt into an EEPROM, and different DUTs burn different drives and IDs; after the test system is powered on, the MCU reads the chip ID on the daughter board, the driver in the EEPROM is loaded into the DUT, the PC controls the whole test system through the |
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