Sampling control circuit and control method for delay chain type time-to-digital converter

The invention aims to solve the problems of overlong delay chain and overwide first delay unit caused by different line delays of a detected signal reaching the delay chain and an edge detection circuit in the existing delay chain type time-to-digital converter, and provides a sampling control circuit and a control method for the delay chain type time-to-digital converter. According to the invention, the output of a first delay unit of a delay chain is used as an input signal of an edge detection circuit, and then whether an effective detected signal enters the delay chain at a rising edge of a previous coarse-grained clock is judged through a fine-grained signal detection circuit; and finally, whether effective time information is generated or not is comprehensively judged through the edge hopping signal and the fine-grained time mark signal, so that the problems of overlong delay chains and different lengths of different delay chains caused by the establishment time of the edge detection circuit are solved,