MEMORY CHIP AND OPERATING METHOD

The invention discloses a memory chip and an operation method, the memory chip comprises a first pin, a first input buffer and a first switch and/or a second pin, a level conversion buffer and a second switch, and through time-sharing work of the first input buffer and the first switch, the level conversion buffer is switched on or off. Therefore, the normal working signal can be transmitted to the first transmission end from the first pin in the first time period, and the first external high-voltage signal can be transmitted to the second transmission end from the first pin in the second time period, so that the first external high-voltage signal can be used for testing on the basis of not increasing the number of the pins. 本申请公开了一种存储芯片及操作方法，该存储芯片包括一第一引脚、一第一输入缓冲器以及一第一开关和/或一第二引脚、一电平转换缓冲器以及一第二开关，通过第一输入缓冲器、第一开关的分时工作，既可以在第一时段中自第一引脚传输正常工作信号至第一传输端，又可以实现在第二时段中自第一引脚传输第一外部高压信号至第二传输端，这样可以在不增加引脚数量的基础上采用第一外部高压信号进行测试工作。