Universal PowerPC architecture processor instruction set virtualization simulation method

The invention relates to a universal PowerPC architecture processor instruction set virtualization simulation method, and belongs to the field of virtual simulation. According to the invention, aiming at 32-bit microprocessor cores e300, e500 and e600 of FreeScale based on Power Architecture, a univ...

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Bibliographische Detailangaben
Hauptverfasser: MIAN BIN, YASUTSUNE, KIM JUNG WOO, AN SHUN, FU XIUFENG, JIA ZHANGTAO, SHAO SA, KONG XIANGBING, LI YASI
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:The invention relates to a universal PowerPC architecture processor instruction set virtualization simulation method, and belongs to the field of virtual simulation. According to the invention, aiming at 32-bit microprocessor cores e300, e500 and e600 of FreeScale based on Power Architecture, a universal processor simulation framework is designed, and simulation operation of processors with various architectures is supported at the same time. And a running environment of the embedded processor software of the PowerPC processor is provided, and support is provided for development of the embedded processor software of the PowerPC processor. According to the scheme provided by the invention, the instruction set simulation of the PowerPC instruction architecture processor can be realized, and the simulation precision is high; according to the invention, the simulation of the register and the memory is realized by adopting an array, a linked list and the like, and the PowerPC instruction architecture processor can