Integrated circuit and integrated circuit power switch synchronization noise test method

An integrated circuit and an integrated circuit power switch synchronization noise test method relate to the integrated circuit technology. A power switch synchronous noise test circuit is arranged in an integrated circuit chip. The power switch synchronous noise test circuit comprises a clock manag...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	LI QINGSA, CHAI HONG, JIA JI
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING
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