Verification method and system based on BMC prototype, computer equipment and storage medium

The invention relates to the technical field of chip testing, in particular to a verification method and system based on a BMC prototype, computer equipment and a storage medium. The method comprises the following steps: analyzing the lengths and protocols of received Ethernet messages, counting the number of the messages, checking CRC (Cyclic Redundancy Check), and uploading the results to a statistical log for recording; checking CRC (Cyclic Redundancy Check) of the sent Ethernet message, counting the number, and selecting the length and the protocol; according to the FPGA prototype verification method based on BMC chip development, in the FPGA prototype verification stage based on BMC chip development, an Ethernet test case interface based on an application layer is provided, and testing with more randomization and higher coverage rate on Ethernet link testing is achieved. And the security and the stability of the Ethernet interface of the chip in the later period are greatly improved. 本发明涉及芯片测试技术领域，具体涉及基于