Time tracking circuit for FRAM
The invention discloses a time tracking circuit for an FRAM. Methods and apparatus for reading and/or writing FRAM memory are disclosed. An example memory circuit (100) includes a controller (102) that outputs a signal to an input of a driver (106, 108); a transistor (107, 109) coupled to an output...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a time tracking circuit for an FRAM. Methods and apparatus for reading and/or writing FRAM memory are disclosed. An example memory circuit (100) includes a controller (102) that outputs a signal to an input of a driver (106, 108); a transistor (107, 109) coupled to an output of the driver (106, 108); a driver (106, 108) that outputs a first voltage to the transistor (107, 109) in response to the reception signal; and a transistor (107, 109) that outputs a second voltage to the bit cell (120) after a delay of the transistor in response to receiving the first voltage, the transistor (107, 109) being selected based on a size of the memory circuit (100).
本申请公开一种用于FRAM的时间跟踪电路。公开了用于读取和/或写入FRAM存储器的方法和设备。示例存储器电路(100)包括:控制器(102),其向驱动器(106、108)的输入端输出信号;晶体管(107、109),其耦合驱动器(106、108)的输出端;驱动器(106、108),其响应于接收信号,向晶体管(107、109)输出第一电压;以及晶体管(107、109),其响应于接收第一电压,在晶体管延迟之后向位单元(120)输出第二电压,晶体管(107、109)基于存储器电路(100)的尺寸被选择。 |
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