Data caching method and device and storage medium
The invention discloses a data caching method and device and a storage medium. The data caching method comprises the steps that the first bit width W1 of input data and the second bit width W2 of output data are determined; the first bit width W1 is different from the second bit width W2; taking the...
Gespeichert in:
Hauptverfasser: | , , , , , , , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | The invention discloses a data caching method and device and a storage medium. The data caching method comprises the steps that the first bit width W1 of input data and the second bit width W2 of output data are determined; the first bit width W1 is different from the second bit width W2; taking the common divisor of the first bit width W1 and the second bit width W2 as the target bit width W of the storage unit, and taking the power n of 2 as the target number d of the storage unit; the target number d is not less than the ratio of the first bit width W1 to the common divisor. According to the method, complex Gray code conversion and synchronous design are avoided in principle, and the hardware resource overhead of the FPGA is reduced. The bit width definition of input and output interfaces is more free and flexible, so that the space occupied by the video memory is greatly reduced, and the cost is saved.
本发明公开了一种数据缓存方法、装置及存储介质,包括确定输入数据的第一位宽W1以及输出数据的第二位宽W2;所述第一位宽W1与所述第二位宽W2不同;将所述第一位宽W1与所述第二位宽W2的公约数作为存储单元的目标位 |
---|