Alignment structure of super junction transistor and manufacturing method

The invention provides an alignment structure of a super junction transistor and a manufacturing method. The alignment structure comprises a substrate with a front surface and a back surface opposite to each other; a super junction unit and a plurality of alignment marks are arranged on the substrat...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: LI TIESHENG, LOU YINGYING
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator LI TIESHENG
LOU YINGYING
description The invention provides an alignment structure of a super junction transistor and a manufacturing method. The alignment structure comprises a substrate with a front surface and a back surface opposite to each other; a super junction unit and a plurality of alignment marks are arranged on the substrate, each alignment mark is arranged on the back surface of the substrate, and the super junction unit is arranged on the front surface of the substrate by taking the alignment marks as references. The alignment mark and the super junction unit are respectively arranged on the back surface and the front surface of the substrate, so that the influence of epitaxial growth on the alignment mark is avoided, and the alignment precision is improved. 本发明提供一种超级结晶体管的对准结构及制造方法,包括具有相对的正面和背面的衬底;所述衬底上设有超级结单元和若干对准标记,其中,各所述对准标记设于所述衬底的背面,所述超级结单元以所述对准标记为基准设于所述衬底的正面。本发明通过将对准标记和超级结单元分设在衬底的背面和正面,避免了外延生长对对准标记的影响,提高了对准精度。
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN115206937A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN115206937A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN115206937A3</originalsourceid><addsrcrecordid>eNqNyrEKwjAQANAsDqL-w_UDBGtR6ViKoouTeznSSxtpLiF3-X8R_ACnt7y1eXSLnzgQK4jmYrVkguhASqIM78JWfWTQjCxeNGZAHiEgF4ff7HmCQDrHcWtWDheh3c-NqW7XV3_fU4oDSUJLTDr0z7o-HQ_ntrl0zT_nA1_lNbM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Alignment structure of super junction transistor and manufacturing method</title><source>esp@cenet</source><creator>LI TIESHENG ; LOU YINGYING</creator><creatorcontrib>LI TIESHENG ; LOU YINGYING</creatorcontrib><description>The invention provides an alignment structure of a super junction transistor and a manufacturing method. The alignment structure comprises a substrate with a front surface and a back surface opposite to each other; a super junction unit and a plurality of alignment marks are arranged on the substrate, each alignment mark is arranged on the back surface of the substrate, and the super junction unit is arranged on the front surface of the substrate by taking the alignment marks as references. The alignment mark and the super junction unit are respectively arranged on the back surface and the front surface of the substrate, so that the influence of epitaxial growth on the alignment mark is avoided, and the alignment precision is improved. 本发明提供一种超级结晶体管的对准结构及制造方法,包括具有相对的正面和背面的衬底;所述衬底上设有超级结单元和若干对准标记,其中,各所述对准标记设于所述衬底的背面,所述超级结单元以所述对准标记为基准设于所述衬底的正面。本发明通过将对准标记和超级结单元分设在衬底的背面和正面,避免了外延生长对对准标记的影响,提高了对准精度。</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20221018&amp;DB=EPODOC&amp;CC=CN&amp;NR=115206937A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20221018&amp;DB=EPODOC&amp;CC=CN&amp;NR=115206937A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LI TIESHENG</creatorcontrib><creatorcontrib>LOU YINGYING</creatorcontrib><title>Alignment structure of super junction transistor and manufacturing method</title><description>The invention provides an alignment structure of a super junction transistor and a manufacturing method. The alignment structure comprises a substrate with a front surface and a back surface opposite to each other; a super junction unit and a plurality of alignment marks are arranged on the substrate, each alignment mark is arranged on the back surface of the substrate, and the super junction unit is arranged on the front surface of the substrate by taking the alignment marks as references. The alignment mark and the super junction unit are respectively arranged on the back surface and the front surface of the substrate, so that the influence of epitaxial growth on the alignment mark is avoided, and the alignment precision is improved. 本发明提供一种超级结晶体管的对准结构及制造方法,包括具有相对的正面和背面的衬底;所述衬底上设有超级结单元和若干对准标记,其中,各所述对准标记设于所述衬底的背面,所述超级结单元以所述对准标记为基准设于所述衬底的正面。本发明通过将对准标记和超级结单元分设在衬底的背面和正面,避免了外延生长对对准标记的影响,提高了对准精度。</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyrEKwjAQANAsDqL-w_UDBGtR6ViKoouTeznSSxtpLiF3-X8R_ACnt7y1eXSLnzgQK4jmYrVkguhASqIM78JWfWTQjCxeNGZAHiEgF4ff7HmCQDrHcWtWDheh3c-NqW7XV3_fU4oDSUJLTDr0z7o-HQ_ntrl0zT_nA1_lNbM</recordid><startdate>20221018</startdate><enddate>20221018</enddate><creator>LI TIESHENG</creator><creator>LOU YINGYING</creator><scope>EVB</scope></search><sort><creationdate>20221018</creationdate><title>Alignment structure of super junction transistor and manufacturing method</title><author>LI TIESHENG ; LOU YINGYING</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN115206937A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LI TIESHENG</creatorcontrib><creatorcontrib>LOU YINGYING</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LI TIESHENG</au><au>LOU YINGYING</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Alignment structure of super junction transistor and manufacturing method</title><date>2022-10-18</date><risdate>2022</risdate><abstract>The invention provides an alignment structure of a super junction transistor and a manufacturing method. The alignment structure comprises a substrate with a front surface and a back surface opposite to each other; a super junction unit and a plurality of alignment marks are arranged on the substrate, each alignment mark is arranged on the back surface of the substrate, and the super junction unit is arranged on the front surface of the substrate by taking the alignment marks as references. The alignment mark and the super junction unit are respectively arranged on the back surface and the front surface of the substrate, so that the influence of epitaxial growth on the alignment mark is avoided, and the alignment precision is improved. 本发明提供一种超级结晶体管的对准结构及制造方法,包括具有相对的正面和背面的衬底;所述衬底上设有超级结单元和若干对准标记,其中,各所述对准标记设于所述衬底的背面,所述超级结单元以所述对准标记为基准设于所述衬底的正面。本发明通过将对准标记和超级结单元分设在衬底的背面和正面,避免了外延生长对对准标记的影响,提高了对准精度。</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_CN115206937A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Alignment structure of super junction transistor and manufacturing method
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-07T03%3A05%3A37IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LI%20TIESHENG&rft.date=2022-10-18&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN115206937A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true