SiC-based MOSFET device with low on-resistance and preparation method thereof

The invention discloses a low-on-resistance SiC-based MOSFET device and a preparation method thereof, a drift layer of the low-on-resistance SiC-based MOSFET device comprises an nx first drift layer and an n-second drift layer arranged on the nx first drift layer, and the doping concentration of the nx first drift layer is higher than that of the n-second drift layer. According to the SiC-based MOSFET device with the segmented doped epitaxial structure, the series resistance of the device is reduced by using the highly doped drift layer far away from the main junction region, and the protection effect of the p-type shielding layer is improved and the Miller charge of the device is reduced by using the low doped layer in the main junction region, so that the switching conversion capability of the SiC-based MOSFET device is improved. 本发明公开了一种低导通电阻的SiC基MOSFET器件及其制备方法，其漂移层包括nx第一漂移层和设于nx第一漂移层上的n-第二漂移层，nx第一漂移层的掺杂浓度高于n-第二漂移层。本发明的具有分段掺杂外延结构的SiC基MOSFET器件，利用远离主结区的高掺杂漂移层降低器件的串联电阻，并利用主结区域的低掺杂层提高p型屏蔽层的保护作用，降低器件的米勒电荷，以提高Si