Manufacturing method of double-gate oxide layer PES-LDMOS

The invention relates to the technical field of integrated circuits, in particular to a manufacturing method of a double-gate oxide layer PES-LDMOS, and the method comprises the following steps: S1, carrying out the ion implantation on a P-type substrate; s2, performing ion implantation to form a P...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: XU LU, LIU YANGMENG, LIU YUTING, LU YUAN, LIAO YONGBO, FENG KE, HUANG LETIAN
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:The invention relates to the technical field of integrated circuits, in particular to a manufacturing method of a double-gate oxide layer PES-LDMOS, and the method comprises the following steps: S1, carrying out the ion implantation on a P-type substrate; s2, performing ion implantation to form a P + region, an N + source region and an N + drain region; s3, the redundant part is etched through an etching process; s4, carrying out SiO2 growth; s5, growing a gate dielectric layer above the channel region; and S6, depositing metal above the gate dielectric layer to form a gate electrode. According to the method, fixed hole charges in the gate dielectric layer above the channel are reduced, and the electron attraction capability of the fixed hole charges is weakened, so that the offset of the threshold voltage Vth is reduced; and secondly, the P + region of the channel can effectively inhibit the formation of a parasitic channel in the STI, thereby inhibiting the leakage current path and reducing the turn-off cur