Zero vector initial SVPWM neutral-point voltage balancing method and related assembly
The invention discloses a zero-vector initial SVPWM neutral-point voltage balancing method and a related component. The method comprises the following steps: acquiring a preset unbalance margin factor K and a direct-current side voltage Udc of a three-level inverter; the neutral-point voltage unbala...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a zero-vector initial SVPWM neutral-point voltage balancing method and a related component. The method comprises the following steps: acquiring a preset unbalance margin factor K and a direct-current side voltage Udc of a three-level inverter; the neutral-point voltage unbalance value Udcdev of the three-level inverter is calculated; when Udcdev is greater than K * Udc, correcting the zero sequence voltage Uzero of the initial SVPWM of the zero vector at the peak value of the triangular carrier; when the Udcdev is less than-K * Udc, correcting the zero sequence voltage Uzero of the zero vector initial SVPWM at the triangular carrier zero point; and injecting the Uzero into a three-phase original modulation wave of the three-level inverter. According to the invention, when the neutral-point voltage unbalance value is positive or negative, neutral-point voltage balance control is realized by correcting the zero-sequence voltage, so that the reliability of the three-level NPC inverter und |
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