Apparatus, method and computer program for executing processor instructions in extension set on multi-core processor

Apparatuses, methods, and computer programs for executing processor instructions in an extended set on a multi-core processor are disclosed. At least some of the disclosed embodiments may utilize a memory management device of a processor to map virtual memory addresses used by application code to physical memory addresses used by a hardware memory bus of a computer system by mapping different executable code blocks onto different running cores. Thus, for cores that support a given extension, very low overhead code blocks that use the supported extension in a simple and direct manner are provided, while for cores that do not support a given extension, replacement code blocks that emulate the unsupported extension using more base and/or base instructions are provided. 本发明公开了用于在多核处理器上执行扩展集中的处理器指令的设备、方法和计算机程序。所公开实施例中的至少一些实施例可以利用处理器的内存管理设备通过将不同的可执行代码块映射到不同的运行核上的方式，将应用代码使用的虚拟内存地址映射到计算机系统的硬件内存总线使用的物理内存地址。因此，对于支持给定扩展的核，提供了以简单直接的方式使用所述支持的扩展且开销非常小的代码块，而对于不支持给定扩展的核，提供了使用更基础和/或基本指令模拟所述不支持的扩展的替换代码块。