P2 architecture hybrid power assembly efficiency test method and test bench
The invention discloses a P2 architecture hybrid power assembly efficiency test method and a test bench, and aims to carry out a test on the test bench. Comprising the steps that a test program is brushed into a whole vehicle controller, a test sample piece is installed on a test bed, a whole vehicl...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a P2 architecture hybrid power assembly efficiency test method and a test bench, and aims to carry out a test on the test bench. Comprising the steps that a test program is brushed into a whole vehicle controller, a test sample piece is installed on a test bed, a whole vehicle DBC file is imported into an upper computer, whole vehicle parameters of the test sample piece and test bed protection parameters are written into the upper computer, test working condition parameters are written into the upper computer, and whole vehicle communication and control debugging are conducted on the test sample piece and the test bed. The instantaneous oil consumption and the MCU instantaneous power of each vehicle speed torque point are obtained by testing each vehicle speed torque point, and then the assembly efficiency value of each vehicle speed torque point is obtained through calculation. Under the condition of ensuring the real vehicle consistency of the test sample and the test sample, the ins |
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