Hopping level vias in metallization layers for integrated circuit devices

An integrated circuit device may be formed that includes an electronic substrate and a metallization structure on the electronic substrate, where the metallization structure includes: a first level including a first dielectric material layer; a second level on the first level, where the second level...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	LIFF SHAWNA, PASDAST, GREGOR, TIAGELAOUI SAMIR NAZMUL, ELSHERBINI ADEL A, KOBRINSKY MAURO, SWAN JOHANNA
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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